9608_s15_qp_13
A paper of Computer Science, 9608
Questions:
7
Year:
2015
Paper:
1
Variant:
3
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2
Assemblers translate from assembly language to machine code. Some assemblers scan the assembly language program twice; these are referred to as two-pass assemblers. The following table shows five activities performed by two-pass assemblers. Write 1 or 2 to indicate whether the activity is carried out during the first pass or during the second pass. Activity First pass or second pass any symbolic address is replaced by an absolute address any directives are acted upon any symbolic address is added to the symbolic address table data items are converted into their binary equivalent forward references are resolved
1. Theory Fundamentals  →  1.4. Processor fundamentals
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3
Give the definition of the terms firewall and authentication. Explain how they can help with the security of data. Firewall Authentication Describe two differences between data integrity and data security. Data integrity is required at the input stage and also during transfer of the data. State two ways of maintaining data integrity at the input stage. Use examples to help explain your answer. State two ways of maintaining data integrity during data transmission. Use examples to help explain your answer.
1. Theory Fundamentals  →  1.6. Security, privacy and data integrity
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4
There are two types of RAM: dynamic RAM (DRAM) and static RAM (SRAM). Five statements about DRAM and SRAM are shown below. Draw a line to link each statement to the appropriate type of RAM. Statement Type of RAM requires data to be refreshed periodically in order to retain the data has more complex circuitry DRAM does not need to be refreshed as the circuit holds the data as long as the power supply is on requires higher power consumption which is significant when used in battery-powered devices SRAM used predominantly in cache memory of processors where speed is important Describe three differences between RAM and ROM. DVD-RAM and flash memory are two examples of storage devices. Describe two differences in how they operate.
1. Theory Fundamentals  →  1.3. Hardware
1. Theory Fundamentals  →  1.4. Processor fundamentals
Open
5
Name and describe three buses used in the von Neumann model. Bus 1 Description Bus 2 Description Bus 3 Description The sequence of operations shows, in register transfer notation, the fetch stage of the fetch- execute cycle. MAR ← [PC] PC ← [PC] + 1 MDR ← [[MAR]] CIR ← [MDR] • [register] denotes contents of the specified register or memory location • step 1 above is read as “the contents of the Program Counter are copied to the Memory Address Register” Describe what is happening at step 2. Describe what is happening at step 3. Describe what is happening at step 4. Describe what happens to the registers when the following instruction is executed: LDD 35 Explain what is meant by an interrupt. Explain the actions of the processor when an interrupt is detected.
1. Theory Fundamentals  →  1.4. Processor fundamentals
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6
Three digital sensors A, B and C are used to monitor a process. The outputs from the sensors are used as the inputs to a logic circuit. A signal, X, is output from the logic circuit: logic circuit A B output X C Output, X, has a value of 1 if either of the following two conditions occur: • sensor A outputs the value 1 OR sensor B outputs the value 0 • sensor B outputs the value 1 AND sensor C outputs the value 0 Draw a logic circuit to represent these conditions. A B C X Complete the truth table for the logic circuit described in part . A B C Working Space X Write a logic statement that describes the following logic circuit. A B C X
1. Theory Fundamentals  →  1.3. Hardware
3. Advanced Theory  →  3.3. Hardware
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7
The table shows assembly language instructions for a processor which has one general purpose register, the Accumulator (ACC). Instruction Explanation Op code Operand LDD Direct addressing. Load contents of given address to ACC STO Store the contents of ACC at the given address LDI Indirect addressing. The address to be used is at the given address. Load the contents of this second address to ACC LDX Indexed addressing. Form the address from + the contents of the index register. Copy the contents of this calculated address to ACC INC Add 1 to contents of the register (ACC) JMP Jump to the given address END Return control to operating system The diagram shows the contents of the memory. Main memory 0 0 0 0 1 0 0 1 0 1 1 1 0 1 0 1 1 0 1 1 0 1 1 0 1 1 1 0 0 1 0 0 0 1 1 1 1 1 1 1 0 0 0 0 0 0 0 1 0 1 0 0 0 0 0 1 0 1 1 0 1 0 0 1 1 0 0 0 1 0 0 0 Show the contents of the Accumulator after execution of the instruction: LDD 121 Accumulator: Show the contents of the Accumulator after execution of the instruction: LDI 124 Accumulator: Explain how you arrived at your answer. Show the contents of the Accumulator after execution of the instruction: LDX 120 Index Register: Accumulator: Explain how you arrived at your answer. Trace the assembly language program using the trace table. LDD INC STO LDI INC STO END Trace table: Accumulator Memory address
1. Theory Fundamentals  →  1.4. Processor fundamentals
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