9608_s21_qp_11
A paper of Computer Science, 9608
Questions:
9
Year:
2021
Paper:
1
Variant:
1

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The table shows part of the instruction set for a processor. The processor has one general purpose register, the Accumulator (ACC), and an Index Register (. Instruction Explanation Op code Operand LDD Direct addressing. Load the content of the location at the given address to ACC. LDI Indirect addressing. The address to be used is at the given address. Load the contents of this second address to ACC. DEC Subtract 1 from the contents of the register (ACC or . CMP Compare the contents of ACC with the contents of . JMP Jump to the given address. JPE Following a compare instruction, jump to if the compare was True. STO Store the contents of ACC at the given address. END Return control to the operating system. The current contents of the main memory are: Address Instruction LDD 200 CMP 201 JPE 106 DEC ACC STO 200 JMP 101 END … Trace the program currently in memory using the following trace table. Instruction address ACC Memory address The instruction in memory address 100 needs to be changed. It needs to use indirect addressing to load the contents of memory address 200. Give the new instruction to replace LDD 200. Each instruction in the assembly language program is encoded in 16 bits (8-bit op code followed by an 8-bit operand). The instruction CMP 201 has the operand 201. Convert the operand 201 into 8-bit binary. State the maximum number of op codes that can be represented using eight bits. The status register contains condition flags. Identify three condition flags that can be set in the status register.
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