The Von Neumann model uses a series of registers. Explain what is meant by the term register. Explain the purpose of the Memory Data Register (MDR). Name two registers, other than the MDR, that are used in the fetch-execute cycle. Register 1 Register 2 X is a register. The current contents of X are: The current contents of register X represent an unsigned binary integer. Convert the value in X into denary. The current contents of register X represent a Binary Coded Decimal. Convert the value in X into denary. The current contents of register X stores a two’s complement binary integer. Convert the value in X into denary.

9608_s18_qp_11

THEORY

2018

Paper 1, Variant 1

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A large warehouse stores goods that must be kept above a temperature of 15 degrees Celsius. The warehouse has six temperature sensors which are each placed at a different location in the warehouse. A computer system is programmed to turn on appropriate heaters when one of the sensors is below the minimum temperature. State the name given to the type of system described. Justify your answer to part . Sensors and heaters are two types of device used in this system. State two other devices that are used. Justify your choice. Device 1 Justification Device 2 Justification The computer system stores the temperature readings for the six sensors in six 8-bit memory locations. Six of the bits in an 8-bit register, LOWREG, are used to indicate whether a particular reading is below the minimum temperature. A value of 1 means the reading is below the minimum temperature. For example: This pattern of bits in LOWREG shows that sensor 5, sensor 4 and sensor 1 have readings below the minimum temperature. Not used Not used The following table shows part of the instruction set for a processor which has one general purpose register, the Accumulator (ACC), and an Index Register (. Instruction Explanation Op code Operand LDD Direct addressing. Load the contents of the given address to ACC. LDR #n Immediate addressing. Load the number n to IX. LDX Indexed addressing. Form the address from + the contents of the index register. Copy the contents of this calculated address to ACC. STO Store the contents of ACC at the given address. INC Add 1 to the contents of the register (ACC or . ADD Add the contents of the given address to the ACC. OR Bitwise OR operation of the contents of ACC with the contents of address. CMP #n Compare the contents of ACC with number n. CMP Compare the contents of ACC with the contents of . JMP Jump to the given address. JPE Following a compare instruction, jump to if the compare was True. JGE Following a compare instruction, jump to if the content of ACC is greater than or equal to the number used in the compare instruction. The code uses six memory locations to store the temperature readings. It stores readings for sensors 1 to 6 at addresses 8000 to 8005. At a particular time, the memory locations store the following data. Dry run the assembly language code starting at START and finishing when the loop has been processed twice. LOWTEMP LOWREG COUNTER ACC IX B00000000 Explain why the operand of the instruction labelled Q1 has the value 32. The code beginning at the instruction labelled HEATON must make the system turn on the heaters in those areas that are below the minimum temperature. Describe what this code will have to do.

9608_w17_qp_31

THEORY

2017

Paper 3, Variant 1

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A large warehouse stores goods that must be kept above a temperature of 15 degrees Celsius. The warehouse has six temperature sensors which are each placed at a different location in the warehouse. A computer system is programmed to turn on appropriate heaters when one of the sensors is below the minimum temperature. State the name given to the type of system described. Justify your answer to part . Sensors and heaters are two types of device used in this system. State two other devices that are used. Justify your choice. Device 1 Justification Device 2 Justification The computer system stores the temperature readings for the six sensors in six 8-bit memory locations. Six of the bits in an 8-bit register, LOWREG, are used to indicate whether a particular reading is below the minimum temperature. A value of 1 means the reading is below the minimum temperature. For example: This pattern of bits in LOWREG shows that sensor 5, sensor 4 and sensor 1 have readings below the minimum temperature. Not used Not used The following table shows part of the instruction set for a processor which has one general purpose register, the Accumulator (ACC), and an Index Register (. Instruction Explanation Op code Operand LDD Direct addressing. Load the contents of the given address to ACC. LDR #n Immediate addressing. Load the number n to IX. LDX Indexed addressing. Form the address from + the contents of the index register. Copy the contents of this calculated address to ACC. STO Store the contents of ACC at the given address. INC Add 1 to the contents of the register (ACC or . ADD Add the contents of the given address to the ACC. OR Bitwise OR operation of the contents of ACC with the contents of address. CMP #n Compare the contents of ACC with number n. CMP Compare the contents of ACC with the contents of . JMP Jump to the given address. JPE Following a compare instruction, jump to if the compare was True. JGE Following a compare instruction, jump to if the content of ACC is greater than or equal to the number used in the compare instruction. The code uses six memory locations to store the temperature readings. It stores readings for sensors 1 to 6 at addresses 8000 to 8005. At a particular time, the memory locations store the following data. Dry run the assembly language code starting at START and finishing when the loop has been processed twice. LOWTEMP LOWREG COUNTER ACC IX B00000000 Explain why the operand of the instruction labelled Q1 has the value 32. The code beginning at the instruction labelled HEATON must make the system turn on the heaters in those areas that are below the minimum temperature. Describe what this code will have to do.

9608_w17_qp_33

THEORY

2017

Paper 3, Variant 3

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Von Neumann is an example of a computer architecture. The diagram has registers used in Von Neumann architecture on the left and descriptions on the right. Draw one line to match each register with its correct description. Register Description Current Instruction Register Memory Address Register Program Counter Memory Data Register Stores the address of the memory location about to be written to or read from Stores the address of the next instruction to be read Stores the address of the input device from which the processor accesses the instruction Stores the instruction that is being decoded and executed Stores the data that has just been read from memory, or is about to be written to memory Many components of the computer system transfer data between them using buses. One example of a bus is an address bus. Name two other buses that exist within a computer and give the purpose of each. Bus 1 Purpose Bus 2 Purpose State the benefit of increasing the address bus width from 16 bits to 32 bits. The following statements describe features of a low-level language. Complete the statements by writing the appropriate terms in the spaces. A is a sequence of instructions that are given an identifier. These instructions may need to be executed several times. A is an instruction that tells the assembler to do something. It is not a program instruction. The processor’s instruction set can be put into several groups. One of these groups is .

9608_w19_qp_11

THEORY

2019

Paper 1, Variant 1

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The following incomplete table shows descriptions relating to computer architectures. Complete the table by inserting the appropriate terms. Description Term A • There are several processors. • Each processor executes different sets of instructions on one set of data at the same time. B • The processor has several ALUs. • Each ALU executes the same set of instructions on different sets of data at the same time. C • There is only one processor. • The processor executes one set of instructions on one set of data. D • There are several processors. • Each processor executes a different set of instructions. • Each processor operates on different sets of data. State three characteristics of massively parallel computers.

9608_w19_qp_31

THEORY

2019

Paper 3, Variant 1

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The following incomplete table shows descriptions relating to computer architectures. Complete the table by inserting the appropriate terms. Description Term A • There are several processors. • Each processor executes different sets of instructions on one set of data at the same time. B • The processor has several ALUs. • Each ALU executes the same set of instructions on different sets of data at the same time. C • There is only one processor. • The processor executes one set of instructions on one set of data. D • There are several processors. • Each processor executes a different set of instructions. • Each processor operates on different sets of data. State three characteristics of massively parallel computers.

9608_w19_qp_33

THEORY

2019

Paper 3, Variant 3

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Complete the following statements about CPU architecture by filling in the missing terms. The Von Neumann model for a computer system uses the program concept. A program is a series of instructions that are saved in . The processor each instruction, it and then it. The processor uses several to store the data and instructions from the program because they can be accessed faster than main memory. The following table shows assembly language instructions for a processor that has one general purpose register, the Accumulator (ACC). Instruction Explanation Op code Operand LDD Direct addressing. Load the contents of the location at the given address to ACC. LDM #n Immediate addressing. Load the denary number n to ACC. LDI Indirect addressing. The address to be used is at the given address. Load the contents of this second address to ACC. STO Store contents of ACC at the given address. ADD Add the contents of the given address to ACC. CMP Compare the contents of ACC with the contents of . OUT Output to screen the character whose ASCII value is stored in ACC. INC Add 1 to the contents of the register (ACC or . JPE Following a compare instruction, jump to if the compare was True. JPN Following a compare instruction, jump to if the compare was False. END Return control to the operating system. The current contents of the main memory are: Address Instruction LDD 80 ADD 80 STO 80 LDD 82 INC ACC STO 82 CMP 81 JPN 50 LDD 80 OUT END … ASCII code table (Selected codes only) ASCII Code Character & ‘ ( ) * Assembly language instructions can be put into groups. Tick (✓) one box in each column to identify the appropriate instruction group for each of the three assembly language instructions. Instruction group Assembly language instruction STO 80 JPN 50 INC ACC Input and output of data Data movement Arithmetic operations Unconditional and conditional jump instructions Compare instructions

9608_w20_qp_12

THEORY

2020

Paper 1, Variant 2

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Complete the following sentences that describe parts of a processor in a Von Neumann model for a computer system. There are buses that transfer data between components in a computer system. The width of the determines the number of directly accessible memory locations. The sends signals on the to direct the operation of system components. pulses are used to synchronise the components on the motherboard. Describe the stages of the fetch-execute (F-E) cycle.

9608_w21_qp_11

THEORY

2021

Paper 1, Variant 1

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Explain how the width of the data bus and system clock speed affect the performance of a computer system. Width of the data bus Clock speed Most computers use Universal Serial Bus (USB) ports to allow the attachment of devices. Describe two benefits of using USB ports. The table shows six stages in the von Neumann fetch-execute cycle. Put the stages into the correct sequence by writing the numbers 1 to 6 in the right hand column. Description of stage Sequence number the instruction is copied from the Memory Data Register (MDR) and placed in the Current Instruction Register (CIR) the instruction is executed the instruction is decoded the address contained in the Program Counter (PC) is copied to the Memory Address Register (MAR) the value in the Program Counter (PC) is incremented so that it points to the next instruction to be fetched the instruction is copied from the memory location contained in the Memory Address Register (MAR) and is placed in the Memory Data Register (MDR)

9608_s15_qp_11

THEORY

2015

Paper 1, Variant 1

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Explain how the width of the data bus and system clock speed affect the performance of a computer system. Width of the data bus Clock speed Most computers use Universal Serial Bus (USB) ports to allow the attachment of devices. Describe two benefits of using USB ports. The table shows six stages in the von Neumann fetch-execute cycle. Put the stages into the correct sequence by writing the numbers 1 to 6 in the right hand column. Description of stage Sequence number the instruction is copied from the Memory Data Register (MDR) and placed in the Current Instruction Register (CIR) the instruction is executed the instruction is decoded the address contained in the Program Counter (PC) is copied to the Memory Address Register (MAR) the value in the Program Counter (PC) is incremented so that it points to the next instruction to be fetched the instruction is copied from the memory location contained in the Memory Address Register (MAR) and is placed in the Memory Data Register (MDR)

9608_s15_qp_12

THEORY

2015

Paper 1, Variant 2

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