9618_w22_qp_13
A paper of Computer Science, 9618
Questions:
10
Year:
2022
Paper:
1
Variant:
3

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The following table shows part of the instruction set for a processor. The processor has one general purpose register, the Accumulator (ACC), and an Index Register (. Instruction Explanation Opcode Operand LDM #n Immediate addressing. Load the number n to ACC LDD Direct addressing. Load the contents of the location at the given address to ACC LDX Indexed addressing. Form the address from + the contents of the index register. Copy the contents of this calculated address to ACC LDR #n Immediate addressing. Load the number n to IX MOV Moves the contents of the accumulator to the given register (STO Store contents of ACC at the given address ADD Add the contents of the given address to the ACC ADD #n Add the denary number n to the ACC SUB #n Subtract the denary number n from the ACC INC Add 1 to the contents of the register (ACC or JMP Jump to the given address CMP #n Compare the contents of ACC with number n CMI Indirect addressing. The address to be used is at the given address. Compare the contents of ACC with the contents of this second address JPE Following a compare instruction, jump to if the compare was True JPN Following a compare instruction, jump to if the compare was False OUT Output to the screen the character whose ASCII value is stored in ACC END Return control to the operating system can be an absolute or a symbolic address # denotes a denary number, e.g. #123 B denotes a binary number, e.g. B01001101 The current contents of main memory and selected values from the ASCII character set are given. Trace the program currently in memory using the trace table. Address Instruction LDR #0 LDD 100 CMP #2 JPE 91 LDX 110 SUB #32 CMP #65 JPN 86 LDM #1 ADD 101 STO 101 LDM #1 ADD 100 STO 100 INC IX JMP 76 LDD 101 ADD #48 OUT END … … ASCII value Character A B C D Instruction address ACC IX Memory address Output Explain the purpose of relative addressing in an assembly language program. The following table shows another part of the instruction set for the processor. Instruction Explanation Opcode Operand AND #n Bitwise AND operation of the contents of ACC with the operand AND Bn Bitwise AND operation of the contents of ACC with the binary number n AND Bitwise AND operation of the contents of ACC with the contents of XOR #n Bitwise XOR operation of the contents of ACC with the operand XOR Bitwise XOR operation of the contents of ACC with the contents of OR #n Bitwise OR operation of the contents of ACC with the operand OR Bn Bitwise OR operation of the contents of ACC with the binary number n OR Bitwise OR operation of the contents of ACC with the contents of LSL #n Bits in ACC are shifted logically n places to the left. Zeros are introduced on the right-hand end LSR #n Bits in ACC are shifted logically n places to the right. Zeros are introduced on the left-hand end can be an absolute or a symbolic address # denotes a denary number, e.g. #123 B denotes a binary number, e.g. B01001101 The current contents of the ACC are: Show the contents of the ACC after the execution of the following instruction. AND B01001100 The current contents of the ACC are: Show the contents of the ACC after the execution of the following instruction. OR B01001111 The current contents of the ACC are: Show the contents of the ACC after the execution of the following instruction. LSR #2 One instruction group is data movement. Give the name of one other instruction group.
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