3. Hardware
A section of Computer Science, 2210
Listing 10 of 109 questions
A user’s computer has a central processing unit (CPU) that has a clock speed of 2 GHz. She wants to change it to a CPU that has a clock speed of 3 GHz. State what is meant by clock speed. Explain the effect this change will have on the performance of the CPU. The CPU contains a memory address register (MAR). Describe the role of the MAR in the fetch–decode–execute cycle. The CPU has a list of all the machine code commands it can process. State the name of this list of commands.
2210_w23_qp_12
THEORY
2023
Paper 1, Variant 2
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A computer has a central processing unit (CPU). Circle three components that are built into the CPU. accumulator (ACC) control unit (CU) graphics card hard disk drive (HDD) motherboard program counter (PC) random access memory (RAM) read only memory (ROM) The CPU has cache. Explain the purpose of the cache. The CPU has a component that regulates the number of fetch–decode–execute cycles the CPU can perform in a second. State the name of this component. The CPU has a component that carries out all calculations and logical operations. State the name of this component.
2210_w23_qp_13
THEORY
2023
Paper 1, Variant 3
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The table contains names and descriptions of components in a central processing unit (CPU). Complete the table by giving the missing component names and descriptions. Component name Description sends signals to manage the flow of data through the CPU program counter stores the address of the data that is about to be fetched from random access memory (RAM) into the CPU transmits data between the RAM and the CPU accumulator stores an instruction when it is being decoded
2210_w24_qp_12
THEORY
2024
Paper 1, Variant 2
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One of the key features of von Neumann computer architecture is the use of buses. Three buses and three descriptions are shown below. Draw a line to connect each bus to its correct description. Bus Description address bus this bus carries signals used to coordinate the computer’s activities control bus this bi-directional bus is used to exchange data between processor, memory and input/ output devices data bus this uni-directional bus carries signals relating to memory addresses between processor and memory The seven stages in a von Neumann fetch-execute cycle are shown in the table below. Put each stage in the correct sequence by writing the numbers 1 to 7 in the right hand column. The first one has been done for you. Stage Sequence number the instruction is then copied from the memory location contained in the MAR (memory address register) and is placed in the MDR (memory data register) the instruction is finally decoded and is then executed the PC (program counter) contains the address of the next instruction to be fetched the entire instruction is then copied from the MDR (memory data register) and placed in the CIR (current instruction register) the address contained in the PC (program counter) is copied to the MAR (memory address register) via the address bus the address part of the instruction, if any, is placed in the MAR (memory address register) the value in the PC (program counter) is then incremented so that it points to the next instruction to be fetched
2210_s15_qp_11
THEORY
2015
Paper 1, Variant 1
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Six components of the Von Neumann model for a computer system and six descriptions are given. Draw a line to match each component to the most suitable description. Component Immediate access store (IAS) Register Accumulator (ACC) Bus Control unit (CU) Arithmetic logic unit (ALU) Description Holds data and instructions when they are loaded from main memory and are waiting to be processed. Holds data temporarily that is currently being used in a calculation. Manages the flow of data and interaction between the components of the processor. Pathway for transmitting data and instructions. Holds data or instructions temporarily when they are being processed. Carries out the calculations on data.
2210_s18_qp_11
THEORY
2018
Paper 1, Variant 1
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Kelvin correctly answers an examination question about the Von Neumann model. Eight different terms have been removed from his answer. Complete the sentences in Kelvin’s answer, using the list given. Not all items in the list need to be used. • accumulator (ACC) • address bus • arithmetic logic unit (ALU) • control unit (CU) • data bus • executed • fetches • immediate access store (IAS) • memory address register (MAR) • memory data register (MDR) • program counter (PC) • saved • transmits The central processing unit (CPU) the data and instructions needed and stores them in the to wait to be processed. The holds the address of the next instruction. This address is sent to the . The data from this address is sent to the . The instruction can then be decoded and . Any calculations that are carried out on the data are done by the . During calculations, the data is temporarily held in a register called the .
2210_s18_qp_12
THEORY
2018
Paper 1, Variant 2
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Four computer terms and eight descriptions are shown below. Draw lines to connect each computer term to the correct description. Computer term Description Arithmetic and logic unit (ALU) Control unit Random access memory (RAM) Read only memory (ROM) Data can be read but not altered Carries out operations such as addition and multiplication Stores bootstrap loader and BIOS Fetches each instruction in turn Carries out operations such as AND, OR, NOT Stores part of the operating system currently in use Stores data currently in use Manages execution of each instruction
2210_w16_qp_12
THEORY
2016
Paper 1, Variant 2
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Questions Discovered
109